This invention relates to a MOS logic circuit including MOS transistors and in particular to a MOS logic circuit capable of changing either its logic functions or changing its transfer signal characteristic without varying its logic functions by varying an output voltage of a voltage generating means in an irreversible fashion.
Where in a conventional MOS logic circuit there occurs a discrepancy between the expected difference in transmission speeds of a plurality of signals and the actual value obtained when the circuit is integrated, it is sometimes necessary to change the logic functions thereof. In the prior art techniques, once a logic circuit has been realized as an integrated circuit, if it is desired to change its logic functions, it is necessary to produce a new integrated circuit. In order to avoid such a time consuming effort, an attempt has been made at a circuit design step to prepare two sorts of circuit patterns, i.e., one having the originally designed logic function and the other having a changed logic function whose design modification is based on initially anticipated problems. In order to avoid producing a logical change to correct for a difference in transmission speeds of a plurality of signals, another attempt is made to design a MOS logic circuit with an excess signal transmission speed allowance or to design a MOS logic circuit by providing an excess allowance to the signal transmission time. However, as the circuit becomes larger in size, complicated in design and higher in circuit operation speed, the conventional method requires difficult to design circuit patterns and suffers a disadvantage of reducing the functionability of the circuit.
On the other hand, in a conventional MOS logic circuit, an input signal voltage/output signal voltage relation, a time variation ratio of the output signal voltage to the input signal voltage or a transmission time ratio of the output signal to the input signal is determined by the electrical characteristic of MOS transistors by which a logic circuit is made up. Once the input/output characteristic has been determined in the conventional MOS logic circuit, the input/output characteristic of the MOS logic circuit cannot be changed unless the process parameters relating to the electrical characteristic of the MOS transistors are varied, thus requiring an excess voltage allowance and excess time allowance and thus complicating the circuit design. As the circuit becomes larger in size and higher in packing density and operation speeds, it becomes more and more difficult to design a proper logic circuit with minimal excess redundancy.